|
Turkish Journal of Electrical Engineering & Computer Sciences
elektrik@tubitak.gov.tr |
Turkish Journal of Electrical Engineering & Computer SciencesVLSI-cell placement technique for Architecture of Field Programmable Gate Array (FPGA) design1Institute of Instrumentation Engineering, Kurukshetra University, Kurukshetra-136119 (Haryana) INDIA e-mail: verma.avnesh@rediffmail.com 2Carrier Institute of Technology and Management, Fraidabad-121001 (Haryana) INDIA Abstract: The Field Programmable Gate Array (FPGA) is an on field programmable device which can be designed for different applications. Various types of software are available for its synthesis. The cell placement depends upon the designing and programming languages used for FPGA. In this paper cell placement technique of FPGA architecture is analyzed for the application of Space Vector Pulse Width Modulation (SVPWM) technique used in speed control of an induction motor. The modulation pulses are produced due to the various components activated and their interconnection in Configurable Logic Blocks (CLBs). Few of its components are so analyzed to find out the reason for their desired output response. This survey has also been conducted to find the correlation of LUTs and formulation of output. Key Words: Field Programmable Gate Array (FPGA), Space Vector Pulse Width Modulation (SVPWM), Configurable Logic Blocks (CLBs), Look Up Table (LUT), Routing, Insulated Gate Bipolar Transistor (IGBT).
Turk. J. Elec. Eng. & Comp. Sci., 17, (2009), 327-336. Full text: pdf Other articles published in the same issue: Turk. J. Elec. Eng. & Comp. Sci.,vol.17,iss.3. |